Top Related Projects
Spike, a RISC-V ISA Simulator
RISC-V Tools (ISA Simulator and Tests)
GNU toolchain for RISC-V, including GCC
Quick Overview
The riscv/riscv-isa-manual repository contains the official RISC-V Instruction Set Manual. RISC-V is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. This repository serves as the authoritative source for RISC-V ISA specifications and documentation.
Pros
- Open-source and freely available, promoting widespread adoption and innovation
- Modular and extensible architecture, allowing for customization and specialization
- Supported by a growing ecosystem of hardware and software developers
- Regularly updated with new extensions and improvements
Cons
- Still evolving, which may lead to compatibility issues between different versions
- Relatively new compared to established architectures like x86 or ARM
- Limited availability of commercial off-the-shelf hardware implementations
- Learning curve for developers accustomed to other architectures
Note: As this is not a code library but rather a specification document, the code example and quick start sections are not applicable.
Competitor Comparisons
Spike, a RISC-V ISA Simulator
Pros of riscv-isa-sim
- Provides a functional simulator for RISC-V, allowing developers to test and debug RISC-V software
- Includes a comprehensive test suite for RISC-V implementations
- Offers a more practical, hands-on approach to understanding RISC-V architecture
Cons of riscv-isa-sim
- Less detailed documentation compared to the ISA manual
- May not cover all aspects of the RISC-V specification as thoroughly as the manual
- Requires more technical knowledge to use effectively
Code Comparison
riscv-isa-sim:
void processor_t::step(size_t n)
{
for (size_t i = 0; i < n; i++)
step(PC_SERIALIZE | INSTRET_SERIALIZE);
host->tick(n);
}
riscv-isa-manual:
\chapter{RV32I Base Integer Instruction Set, Version 2.1}
\label{rv32}
This chapter describes the RV32I base integer instruction set.
The riscv-isa-sim repository contains C++ code for simulating RISC-V processors, while the riscv-isa-manual repository primarily consists of LaTeX documentation describing the RISC-V instruction set architecture.
RISC-V Tools (ISA Simulator and Tests)
Pros of riscv-tools
- Provides a comprehensive toolchain for RISC-V development
- Includes simulators and debugging tools for practical implementation
- Regularly updated with new features and bug fixes
Cons of riscv-tools
- Larger repository size due to inclusion of multiple tools
- May require more setup and configuration for specific use cases
- Less focused on the ISA specification itself
Code Comparison
riscv-isa-manual:
\chapter{RV32I Base Integer Instruction Set, Version 2.1}
\label{rv32}
This chapter describes the RV32I base integer instruction set.
riscv-tools:
RISCV_GCC := $(RISCV)/bin/riscv64-unknown-elf-gcc
RISCV_GXX := $(RISCV)/bin/riscv64-unknown-elf-g++
RISCV_OBJDUMP := $(RISCV)/bin/riscv64-unknown-elf-objdump
The riscv-isa-manual focuses on documenting the RISC-V instruction set architecture, while riscv-tools provides practical tools for RISC-V development. The code snippets illustrate this difference, with riscv-isa-manual containing LaTeX documentation and riscv-tools including Makefile definitions for toolchain components.
GNU toolchain for RISC-V, including GCC
Pros of riscv-gnu-toolchain
- Provides practical development tools for RISC-V, including compilers and debuggers
- Regularly updated with new features and bug fixes
- Enables actual RISC-V software development and testing
Cons of riscv-gnu-toolchain
- More complex to set up and use compared to reading a manual
- May not always reflect the latest ISA specifications immediately
- Requires more system resources and technical knowledge to utilize effectively
Code Comparison
riscv-isa-manual (LaTeX source for documentation):
\chapter{RV32I Base Integer Instruction Set, Version 2.1}
\label{rv32}
This chapter describes the RV32I base integer instruction set.
riscv-gnu-toolchain (Makefile for building tools):
build-binutils-newlib: stamps/build-binutils-newlib
stamps/build-binutils-newlib: $(BINUTILS_SRCDIR) $(NEWLIB_SRCDIR)
rm -rf $@ $(notdir $@)
mkdir $(notdir $@)
The riscv-isa-manual repository contains the official RISC-V instruction set architecture specification, while riscv-gnu-toolchain provides the actual tools for RISC-V software development. The former is crucial for understanding the architecture, while the latter is essential for practical implementation and testing.
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RISC-V Instruction Set Manual
This repository contains the source files for the RISC-V Instruction Set Manual, which consists of the Privileged RISC-V Instruction Set Manual (LaTeX) and the Unprivileged RISC-V Instruction Set Manual (AsciiDoc). The preface of each document indicates the version of each standard that has been formally ratified by RISC-V International.
This work is licensed under a Creative Commons Attribution 4.0 International License. See the LICENSE file for details.
The RISC-V Instruction Set Manual is organized into the following volumes:
- Volume I: User-Level ISA
- Volume II: Privileged Architecture
Official and Draft Versions
- Official versions of the specifications are available at the RISC-V International website.
- Compiled versions of the most recent drafts of the specifications can be found on the GitHub releases page.
- Older official versions of the specifications are archived at the GitHub releases archive.
The canonical list of open-source RISC-V implementations' marchid CSR values is available in the marchid.md file.
Contributing
If you would like to contribute to this documentation, please refer to the Documentation Developer's Guide.
The recommended method for building the PDF files is to use the Docker Image, as described in the RISC-V Docs Base Container Image repository.
Alternative build methods, such as local builds and GitHub Action builds, are also available and described in the Documentation Developer's Guide.
Images not rendered for EPUB files
If the eBook reader does not support embedded images, uncomment :data-uri: lines in src/riscv-privileged.adoc and src/riscv-unprivileged.adoc.
Known devices that cannot handle embedded images
- PocketBook InkPad 3
Repo Activity
Top Related Projects
Spike, a RISC-V ISA Simulator
RISC-V Tools (ISA Simulator and Tests)
GNU toolchain for RISC-V, including GCC
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